[llvm] [CodeGen][MachineVerifier] Use TypeSize instead of unsigned for getRe… (PR #70881)

[David Green via llvm-commits]

davemgreen wrote:

Do you plan to mark register sizes as scalable?

I was looking at the bare minimum needed to get scalable vectors working for GlobalISel last week, and got something that worked, but would likely hit a lot of other problems. I wasn't sure if it would end up being necessary to mark the registers as scalable, the patch I had was still very much work-in-progress.

https://github.com/llvm/llvm-project/pull/70881