[llvm] [RISCV] Add experimental support for making i32 a legal type on RV64 in SelectionDAG. (PR #70357)

[Craig Topper via llvm-commits]

topperc wrote:

> Thanks for testing! I must missed something when I tried this.
> 
> 
> 
> I see from the diff that we can remove some complexities of GISel. My concern is that we add too much complexities to DAG lowering and TableGen patterns and I don't know if it's worthy.

My hope is that we can make this default in the next 6 months and simplify the DAG lowering again.



https://github.com/llvm/llvm-project/pull/70357