[llvm] [RISCV] Combine trunc (srl zext (x), zext (y)) to srl (x, umin (y, scalarsizeinbits(y) - 1)) (PR #69092)

Luke Lau via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 16 07:57:19 PDT 2023


lukel97 wrote:

It this valid for y > 7? E.g. `(trunc (srl (zext 128 to i32), (zext 8 to i32)) to i8) = 0`, but if we clip y to `umin(y, scalarsizeinbits(y) - 1)` then we get `(srl 128, 7) = 1`

https://alive2.llvm.org/ce/z/T28oxz

https://github.com/llvm/llvm-project/pull/69092


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