[llvm] [AArch64][GlobalISel] Mark LD1R as not accepting immediate operand (PR #69003)

[Vladislav Dzhidzhoev via llvm-commits]

https://github.com/dzhidzhoev created https://github.com/llvm/llvm-project/pull/69003

This is to fix https://github.com/llvm/llvm-project/pull/66914#issuecomment-1729480020 for https://github.com/llvm/llvm-project/pull/66914.


>From 35d1b8147375fb95b01422320c2eae930c2bc659 Mon Sep 17 00:00:00 2001
From: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: Fri, 13 Oct 2023 17:38:24 +0200
Subject: [PATCH] [AArch64][GlobalISel] Mark LD1R as not accepting immediate
 operand

This is to fix https://github.com/llvm/llvm-project/pull/66914#issuecomment-1729480020 for https://github.com/llvm/llvm-project/pull/66914.
---
 llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index e03a94de007c9f5..186a703975c6f97 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -5581,6 +5581,14 @@ int llvm::isAArch64FrameOffsetLegal(const MachineInstr &MI,
   switch (MI.getOpcode()) {
   default:
     break;
+  case AArch64::LD1Rv1d:
+  case AArch64::LD1Rv2s:
+  case AArch64::LD1Rv2d:
+  case AArch64::LD1Rv4h:
+  case AArch64::LD1Rv4s:
+  case AArch64::LD1Rv8b:
+  case AArch64::LD1Rv8h:
+  case AArch64::LD1Rv16b:
   case AArch64::LD1Twov2d:
   case AArch64::LD1Threev2d:
   case AArch64::LD1Fourv2d: