[llvm] [RISCV] Improve cleanup phase of RISCV Insert VSETVLI pass (PR #67144)

[Wang Pengcheng via llvm-commits]

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@@ -834,8 +834,7 @@ define <vscale x 2 x i32> @pre_lmul(<vscale x 2 x i32> %x, <vscale x 2 x i32> %y
 ; CHECK-LABEL: pre_lmul:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    andi a0, a0, 1
-; CHECK-NEXT:    vsetvli a1, zero, e64, m1, ta, ma
-; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma
+; CHECK-NEXT:    vsetvli a1, zero, e32, m1, ta, ma
 ; CHECK-NEXT:    vadd.vv v8, v8, v9
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wangpc-pp wrote:

Good catch! I think it is a wrong optimization here.
> What is the purpose of vsetvli zero, a1, e32, m1, ta, ma?

It set `vl` to `a1` (result of `%vl = tail call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 0)`) and change `vtype` to `e32, m1`, which matches semantics of LLVM IR.

https://github.com/llvm/llvm-project/pull/67144