[llvm] [AMDGPU] Change the representation of double literals in operands (PR #68740)

[Jay Foad via llvm-commits]

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@@ -4297,7 +4301,18 @@ bool AMDGPUAsmParser::validateVOPLiteral(const MCInst &Inst,
       continue;
 
     if (MO.isImm() && !isInlineConstant(Inst, OpIdx)) {
-      uint32_t Value = static_cast<uint32_t>(MO.getImm());
+      uint64_t Value = static_cast<uint64_t>(MO.getImm());
+      bool IsFP = AMDGPU::isSISrcFPOperand(Desc, OpIdx);
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jayfoad wrote:

I don't fully understand this either. Are you trying to allow cases where the same 32-bit literal is used both as the high 32 bits of a double, and as a normal 32 bit integer, in the same instruction?

https://github.com/llvm/llvm-project/pull/68740