[llvm] [AMDGPU] Change the representation of double literals in operands (PR #68740)

[Stanislav Mekhanoshin via llvm-commits]

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@@ -2241,7 +2242,10 @@ void AMDGPUOperand::addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyMo
       return;
     }
 
-    Inst.addOperand(MCOperand::createImm(Lo_32(Val)));
+    if (isInt<32>(Val) || isUInt<32>(Val))
+      Val = AMDGPU::isSISrcFPOperand(InstDesc, OpNum) ? Val << 32 : Lo_32(Val);
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rampitec wrote:

To mask potential 0xffffffff in the high32 bits.

https://github.com/llvm/llvm-project/pull/68740