[llvm] [RISCV] Remove FrameIndex case in lui+addi MacroFusion (PR #68701)
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Tue Oct 10 05:36:20 PDT 2023
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-risc-v
Author: Wang Pengcheng (wangpc-pp)
<details>
<summary>Changes</summary>
Correct me if I am wrong, if the first operand of ADDI is a frame
index, then it won't have data dependency of predecessor LUI. So
it is impossible to do the DAG mutation in these two instructions.
---
Full diff: https://github.com/llvm/llvm-project/pull/68701.diff
1 Files Affected:
- (modified) llvm/lib/Target/RISCV/RISCVMacroFusion.cpp (-4)
``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVMacroFusion.cpp b/llvm/lib/Target/RISCV/RISCVMacroFusion.cpp
index da104657680a6b9..02a8d5c18fe1a0e 100644
--- a/llvm/lib/Target/RISCV/RISCVMacroFusion.cpp
+++ b/llvm/lib/Target/RISCV/RISCVMacroFusion.cpp
@@ -35,10 +35,6 @@ static bool isLUIADDI(const MachineInstr *FirstMI,
if (FirstMI->getOpcode() != RISCV::LUI)
return false;
- // The first operand of ADDI might be a frame index.
- if (!SecondMI.getOperand(1).isReg())
- return false;
-
Register FirstDest = FirstMI->getOperand(0).getReg();
// Destination of LUI should be the ADDI(W) source register.
``````````
</details>
https://github.com/llvm/llvm-project/pull/68701
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