[llvm] [RISCV] Remove FrameIndex case in lui+addi MacroFusion (PR #68701)

[Wang Pengcheng via llvm-commits]

https://github.com/wangpc-pp created https://github.com/llvm/llvm-project/pull/68701

Correct me if I am wrong, if the first operand of ADDI is a frame
index, then it won't have data dependency of predecessor LUI. So
it is impossible to do the DAG mutation in these two instructions.


>From cd0411b295bccfa7d3db525c57f8f9f564eaf8ed Mon Sep 17 00:00:00 2001
From: wangpc <wangpengcheng.pp at bytedance.com>
Date: Tue, 10 Oct 2023 20:30:51 +0800
Subject: [PATCH] [RISCV] Remove FrameIndex case in lui+addi MacroFusion

Correct me if I am wrong, if the first operand of ADDI is a frame
index, then it won't have data dependency of predecessor LUI. So
it is impossible to do the DAG mutation in these two instructions.
---
 llvm/lib/Target/RISCV/RISCVMacroFusion.cpp | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVMacroFusion.cpp b/llvm/lib/Target/RISCV/RISCVMacroFusion.cpp
index da104657680a6b9..02a8d5c18fe1a0e 100644
--- a/llvm/lib/Target/RISCV/RISCVMacroFusion.cpp
+++ b/llvm/lib/Target/RISCV/RISCVMacroFusion.cpp
@@ -35,10 +35,6 @@ static bool isLUIADDI(const MachineInstr *FirstMI,
   if (FirstMI->getOpcode() != RISCV::LUI)
     return false;
 
-  // The first operand of ADDI might be a frame index.
-  if (!SecondMI.getOperand(1).isReg())
-    return false;
-
   Register FirstDest = FirstMI->getOperand(0).getReg();
 
   // Destination of LUI should be the ADDI(W) source register.