[llvm] [RISCV][GlobalISel] Select G_PTR_ADD (PR #67605)

[Min-Yih Hsu via llvm-commits]

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@@ -45,6 +45,16 @@ class RISCVInstructionSelector : public InstructionSelector {
   getRegClassForTypeOnBank(LLT Ty, const RegisterBank &RB) const;
 
   bool selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const;
+
+  // A lowering phase that runs before any selection attempts.
+  // Returns true if the instruction was modified.
+  bool preISelLower(MachineInstr &MI, MachineIRBuilder &MIB,
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mshockwave wrote:

I don't think we need the return value here, as opposed to its AArch64 counterpart

https://github.com/llvm/llvm-project/pull/67605