[llvm] [SPIRV] Implement log10 for logical SPIR-V (PR #66921)

[Natalie Chouinard via llvm-commits]

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@@ -260,8 +260,18 @@ Register SPIRVGlobalRegistry::buildConstantFP(APFloat Val,
     MF.getRegInfo().setRegClass(Res, &SPIRV::IDRegClass);
     assignTypeToVReg(LLVMFPTy, Res, MIRBuilder);
     DT.add(ConstFP, &MF, Res);
-    MIRBuilder.buildFConstant(Res, *ConstFP);
+    if (EmitIR) {
+      MIRBuilder.buildFConstant(Res, *ConstFP);
+    } else {
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sudonatalie wrote:

> But now that you call it in the instruction selector which is later you need to generate this ?

Yes

> Wondering if the only usage today could be replaced by the new code?
> What if you directly generate the constant SPIR-V instruction in SPIRVBuilting?
> Is that breaking something like some constant propagation pass?

That shouldn't be a problem. MIR and gMIR can be mixed and actually it looks like the one place `SPIRVBuiltin` uses the const is within a SPIR-V instruction so it might as well be a SPIR-V const.

https://github.com/llvm/llvm-project/pull/66921