[llvm] [SPIRV] Implement log10 for logical SPIR-V (PR #66921)

[Nathan Gauër via llvm-commits]

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@@ -260,8 +260,18 @@ Register SPIRVGlobalRegistry::buildConstantFP(APFloat Val,
     MF.getRegInfo().setRegClass(Res, &SPIRV::IDRegClass);
     assignTypeToVReg(LLVMFPTy, Res, MIRBuilder);
     DT.add(ConstFP, &MF, Res);
-    MIRBuilder.buildFConstant(Res, *ConstFP);
+    if (EmitIR) {
+      MIRBuilder.buildFConstant(Res, *ConstFP);
+    } else {
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Keenuts wrote:

Right.
So before it was called in only one location: `SPIRVBuiltins.cpp`, but this was before the final lowering, so calling `MIRBuilder.buildFConstant` was fine.
But now that you call it in the instruction selector which is later you need to generate this ?
Wondering if the only usage today could be replaced by the new code?
What if you directly generate the constant SPIR-V instruction in SPIRVBuilting?
Is that breaking something like some constant propagation pass?

https://github.com/llvm/llvm-project/pull/66921