[llvm] Late temporal divergence lowering for SDAG (PR #67033)
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Wed Sep 27 02:45:09 PDT 2023
petar-avramovic wrote:
> > > I doubt how much help MachineUniformityAnalysis could help here, can it correctly differentiate uniform/divergent booleans stored in SGPR at this late stage? Do you have some tests to show this?
> >
> >
> > MUA depends on TRI::isUniformReg(), which eventually relies on RBI::isDivergentRegBank(). So yes, MUA can differentiate between a uniform SGPR and a "VCC" type SGPR.
>
> I think this is for the GlobalISel path? Does the SDAG path also work this way?
If you use sgpr register class + LLT::scalar(1) on all lane mask registers it works. Currently neither path does this. But it is more convenient for GlobalISel since most lane masks already have LLT::scalar(1) before register classes are assigned.
https://github.com/llvm/llvm-project/pull/67033
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