[llvm] [InlineAsm] add comments for NumOperands and ConstraintType (PR #67474)

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llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-llvm-ir

<details>
<summary>Changes</summary>

Splitting up patches for #<!-- -->20571. I found these comments generally useful
to add and not predicated on those changes. Hopefully they help future
travelers.


---
Full diff: https://github.com/llvm/llvm-project/pull/67474.diff


2 Files Affected:

- (modified) llvm/include/llvm/IR/InlineAsm.h (+3-1) 
- (modified) llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp (+6-2) 


``````````diff
diff --git a/llvm/include/llvm/IR/InlineAsm.h b/llvm/include/llvm/IR/InlineAsm.h
index 0c0389871fc2f9b..fdb76b3ec969705 100644
--- a/llvm/include/llvm/IR/InlineAsm.h
+++ b/llvm/include/llvm/IR/InlineAsm.h
@@ -279,7 +279,9 @@ class InlineAsm final : public Value {
   // The encoding of Flag is currently:
   //   Bits 2-0 - A Kind::* value indicating the kind of the operand. (KindField)
   //   Bits 15-3 - The number of SDNode operands associated with
-  //               this inline assembly operand. (NumOperands)
+  //               this inline assembly operand. Once lowered to MIR, this
+  //               represents the number of MachineOperands necessary to
+  //               refer to a MachineOperandType::MO_FrameIndex. (NumOperands)
   //   Bit 31 - determines if this is a matched operand. (IsMatched)
   //   If bit 31 is set:
   //     Bits 30-16 - The operand number that this operand must match. (MatchedOperandNo)
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 6aaaa2f68638c7d..0ba79098b7dd724 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -5803,11 +5803,15 @@ TargetLowering::ConstraintWeight
 
 /// If there are multiple different constraints that we could pick for this
 /// operand (e.g. "imr") try to pick the 'best' one.
-/// This is somewhat tricky: constraints fall into four classes:
-///    Other         -> immediates and magic values
+/// This is somewhat tricky: constraints (TargetLowering::ConstraintType) fall
+/// into seven classes:
 ///    Register      -> one specific register
 ///    RegisterClass -> a group of regs
 ///    Memory        -> memory
+///    Address       -> a symbolic memory reference
+///    Immediate     -> immediate values
+///    Other         -> magic values (such as "Flag Output Operands")
+///    Unknown       -> something we don't recognize yet and can't handle
 /// Ideally, we would pick the most specific constraint possible: if we have
 /// something that fits into a register, we would pick it.  The problem here
 /// is that if we have something that could either be in a register or in

``````````

</details>


https://github.com/llvm/llvm-project/pull/67474