[llvm] [RISCV][GISel] Add instruction selection for G_SEXT, G_ZEXT, and G_SEXT_INREG (PR #67359)

[Min-Yih Hsu via llvm-commits]

================
@@ -1774,6 +1774,12 @@ let Predicates = [IsRV64], hasSideEffects = 0, mayLoad = 0, mayStore = 0,
 def PseudoZEXT_W : Pseudo<(outs GPR:$rd), (ins GPR:$rs), [], "zext.w", "$rd, $rs">;
 } // Predicates = [IsRV64], ...
 
+let Predicates = [IsRV64] in
----------------
mshockwave wrote:

I didn't know there is such file. It will be fixed.

https://github.com/llvm/llvm-project/pull/67359