[llvm] [NVPTX] Optimize v16i8 reductions (PR #67322)

[Artem Belevich via llvm-commits]

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@@ -673,7 +673,8 @@ NVPTXTargetLowering::NVPTXTargetLowering(const NVPTXTargetMachine &TM,
 
   // We have some custom DAG combine patterns for these nodes
   setTargetDAGCombine({ISD::ADD, ISD::AND, ISD::FADD, ISD::MUL, ISD::SHL,
-                       ISD::SREM, ISD::UREM, ISD::EXTRACT_VECTOR_ELT});
+                       ISD::SREM, ISD::UREM, ISD::EXTRACT_VECTOR_ELT, ISD::LOAD,
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Artem-B wrote:

Nit: sort constants alphabetically

https://github.com/llvm/llvm-project/pull/67322