[PATCH] D153148: [InstCombine] Fold `(-1 + A) & B` into `A ? 0 : B` where A is effectively a bool
Yingwei Zheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 24 04:11:54 PDT 2023
This revision was automatically updated to reflect the committed changes.
Closed by commit rG4c241a9335c3: [InstCombine] Fold `(-1 + A) & B` into `A ? 0 : B` where A is effectively a bool (authored by dtcxzyw).
Changed prior to commit:
https://reviews.llvm.org/D153148?vs=556373&id=557281#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D153148/new/
https://reviews.llvm.org/D153148
Files:
llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
llvm/test/Transforms/InstCombine/binop-cast.ll
llvm/test/Transforms/InstCombine/rem-mul-shl.ll
Index: llvm/test/Transforms/InstCombine/rem-mul-shl.ll
===================================================================
--- llvm/test/Transforms/InstCombine/rem-mul-shl.ll
+++ llvm/test/Transforms/InstCombine/rem-mul-shl.ll
@@ -930,10 +930,9 @@
; Negative test: the %sign may be 0, https://alive2.llvm.org/ce/z/WU_j4a
define i32 @and_add_and (i32 %x) {
; CHECK-LABEL: @and_add_and(
-; CHECK-NEXT: [[X1:%.*]] = lshr i32 [[X:%.*]], 7
-; CHECK-NEXT: [[SIGN:%.*]] = and i32 [[X1]], 1
-; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SIGN]], -1
-; CHECK-NEXT: [[AND:%.*]] = and i32 [[ADD]], -2147483648
+; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[X:%.*]], 24
+; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], -2147483648
+; CHECK-NEXT: [[AND:%.*]] = xor i32 [[TMP2]], -2147483648
; CHECK-NEXT: ret i32 [[AND]]
;
%x1 = lshr i32 %x, 7
Index: llvm/test/Transforms/InstCombine/binop-cast.ll
===================================================================
--- llvm/test/Transforms/InstCombine/binop-cast.ll
+++ llvm/test/Transforms/InstCombine/binop-cast.ll
@@ -261,9 +261,8 @@
define i64 @PR63321(ptr %ptr, i64 %c) {
; CHECK-LABEL: @PR63321(
; CHECK-NEXT: [[VAL:%.*]] = load i8, ptr [[PTR:%.*]], align 1, !range [[RNG0:![0-9]+]]
-; CHECK-NEXT: [[RHS:%.*]] = zext i8 [[VAL]] to i64
-; CHECK-NEXT: [[MASK:%.*]] = add nsw i64 [[RHS]], -1
-; CHECK-NEXT: [[RES:%.*]] = and i64 [[MASK]], [[C:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[VAL]], 0
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[TMP1]], i64 [[C:%.*]], i64 0
; CHECK-NEXT: ret i64 [[RES]]
;
%val = load i8, ptr %ptr, align 1, !range !{i8 0, i8 2}
@@ -300,12 +299,11 @@
ret i32 %res
}
-; Negative test of and_add_bool_to_select
define i32 @and_add_bool_no_fold(i32 %y) {
; CHECK-LABEL: @and_add_bool_no_fold(
; CHECK-NEXT: [[X:%.*]] = and i32 [[Y:%.*]], 1
-; CHECK-NEXT: [[MASK:%.*]] = add nsw i32 [[X]], -1
-; CHECK-NEXT: [[RES:%.*]] = and i32 [[MASK]], [[Y]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[X]], 0
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[TMP1]], i32 [[Y]], i32 0
; CHECK-NEXT: ret i32 [[RES]]
;
%x = and i32 %y, 1
Index: llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
===================================================================
--- llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+++ llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
@@ -2654,6 +2654,18 @@
A->getType()->isIntOrIntVectorTy(1))
return SelectInst::Create(A, Constant::getNullValue(Ty), B);
+ // (-1 + A) & B --> A ? 0 : B where A is 0/1.
+ if (match(&I, m_c_And(m_OneUse(m_Add(m_ZExtOrSelf(m_Value(A)), m_AllOnes())),
+ m_Value(B)))) {
+ if (A->getType()->isIntOrIntVectorTy(1))
+ return SelectInst::Create(A, Constant::getNullValue(Ty), B);
+ if (computeKnownBits(A, /* Depth */ 0, &I).countMaxActiveBits() <= 1) {
+ return SelectInst::Create(
+ Builder.CreateICmpEQ(A, Constant::getNullValue(A->getType())), B,
+ Constant::getNullValue(Ty));
+ }
+ }
+
// (iN X s>> (N-1)) & Y --> (X s< 0) ? Y : 0 -- with optional sext
if (match(&I, m_c_And(m_OneUse(m_SExtOrSelf(
m_AShr(m_Value(X), m_APIntAllowUndef(C)))),
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