[llvm] [RISCV] Support floating point VCIX (PR #67094)

Brandon Wu via llvm-commits llvm-commits at lists.llvm.org
Sun Sep 24 01:57:29 PDT 2023


4vtomat wrote:

> The target is support LLVM IR part only, we would like to prevent expose that on the C intrinsic level if possible, because that's intentionally to expose vector with unsigned integer only.

Sure~

https://github.com/llvm/llvm-project/pull/67094


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