[llvm] [RISCV][GISel] Emit G_CONSTANT 0 as a copy from X0. (PR #67202)

[Michael Maitland via llvm-commits]

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@@ -1,8 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=riscv32 -mattr=+m -global-isel -verify-machineinstrs < %s \
-; RUN:   | FileCheck %s --check-prefix=RV32IM
+; RUN:   -riscv-enable-copy-propagation=false | FileCheck %s --check-prefix=RV32IM
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michaelmaitland wrote:

I pulled down your PR, built llc, changed this option to true, and there was no impact on the diff. I am confused what you mean about see through the ADDI when we have a sub instr.

https://github.com/llvm/llvm-project/pull/67202