[llvm] [TableGen][RISCV][GlobalISel] Select G_ICMP, G_SELECT, G_PTR_ADD (PR #67185)

via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 22 12:42:01 PDT 2023


github-actions[bot] wrote:


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git-clang-format --diff 46d5d264fc66a017bbd0182b2b5fcc0f3f23d3be 7211d37388a4ee9c31f566270f5a0b8e71c87523 -- llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp llvm/utils/TableGen/InfoByHwMode.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp b/llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
index ac628396ced9..bbd636edf18e 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
@@ -282,8 +282,8 @@ void RISCVInstructionSelector::renderNegImm(MachineInstrBuilder &MIB,
 }
 
 void RISCVInstructionSelector::renderImmPlus1(MachineInstrBuilder &MIB,
-                                           const MachineInstr &MI,
-                                           int OpIdx) const {
+                                              const MachineInstr &MI,
+                                              int OpIdx) const {
   assert(MI.getOpcode() == TargetOpcode::G_CONSTANT && OpIdx == -1 &&
          "Expected G_CONSTANT");
   int64_t CstVal = MI.getOperand(1).getCImm()->getSExtValue();

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https://github.com/llvm/llvm-project/pull/67185


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