[llvm] b38f31a - [RISCV] Ruse an existing variable to shorten a line [nfc]
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 22 10:38:18 PDT 2023
Author: Philip Reames
Date: 2023-09-22T10:38:10-07:00
New Revision: b38f31aeb0d1c3a97306efa8e5161171f07aa44c
URL: https://github.com/llvm/llvm-project/commit/b38f31aeb0d1c3a97306efa8e5161171f07aa44c
DIFF: https://github.com/llvm/llvm-project/commit/b38f31aeb0d1c3a97306efa8e5161171f07aa44c.diff
LOG: [RISCV] Ruse an existing variable to shorten a line [nfc]
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 1039d52a3f6cf7b..000c7157fe8e827 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -3521,11 +3521,9 @@ static SDValue lowerBuildVectorOfConstants(SDValue Op, SelectionDAG &DAG,
// by vrgather.vv. This covers all indice vectors up to size 4.
// TODO: We really should be costing the smaller vector. There are
// profitable cases this misses.
- const unsigned ScalarSize =
- Op.getSimpleValueType().getScalarSizeInBits();
- if (ScalarSize > 8 && NumElts <= 4) {
+ if (EltBitSize > 8 && NumElts <= 4) {
unsigned SignBits = DAG.ComputeNumSignBits(Op);
- if (ScalarSize - SignBits < 8) {
+ if (EltBitSize - SignBits < 8) {
SDValue Source =
DAG.getNode(ISD::TRUNCATE, DL, VT.changeVectorElementType(MVT::i8), Op);
Source = convertToScalableVector(ContainerVT.changeVectorElementType(MVT::i8),
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