[llvm] 8b2290d - [Atomic][doc] Fix outdated hook name and description (#66989)

[via llvm-commits]

Author: Wang Pengcheng
Date: 2023-09-23T01:24:10+08:00
New Revision: 8b2290d56b5df15e84cfb3346b88ccdef803613e

URL: https://github.com/llvm/llvm-project/commit/8b2290d56b5df15e84cfb3346b88ccdef803613e
DIFF: https://github.com/llvm/llvm-project/commit/8b2290d56b5df15e84cfb3346b88ccdef803613e.diff

LOG: [Atomic][doc] Fix outdated hook name and description (#66989)

`setInsertFencesForAtomic` is `shouldInsertFencesForAtomic` now.

Added: 
    

Modified: 
    llvm/docs/Atomics.rst
    llvm/lib/Target/XCore/XCoreISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/docs/Atomics.rst b/llvm/docs/Atomics.rst
index f64a0aa89b77de3..6ad6e1812cb0a66 100644
--- a/llvm/docs/Atomics.rst
+++ b/llvm/docs/Atomics.rst
@@ -409,7 +409,7 @@ Atomics and Codegen
 Atomic operations are represented in the SelectionDAG with ``ATOMIC_*`` opcodes.
 On architectures which use barrier instructions for all atomic ordering (like
 ARM), appropriate fences can be emitted by the AtomicExpand Codegen pass if
-``setInsertFencesForAtomic()`` was used.
+``shouldInsertFencesForAtomic()`` returns true.
 
 The MachineMemOperand for all atomic operations is currently marked as volatile;
 this is not correct in the IR sense of volatile, but CodeGen handles anything

diff  --git a/llvm/lib/Target/XCore/XCoreISelLowering.cpp b/llvm/lib/Target/XCore/XCoreISelLowering.cpp
index 34f2a0576e7c4e3..4604bcc14ee20df 100644
--- a/llvm/lib/Target/XCore/XCoreISelLowering.cpp
+++ b/llvm/lib/Target/XCore/XCoreISelLowering.cpp
@@ -936,7 +936,7 @@ LowerATOMIC_LOAD(SDValue Op, SelectionDAG &DAG) const {
   assert(N->getOpcode() == ISD::ATOMIC_LOAD && "Bad Atomic OP");
   assert((N->getSuccessOrdering() == AtomicOrdering::Unordered ||
           N->getSuccessOrdering() == AtomicOrdering::Monotonic) &&
-         "setInsertFencesForAtomic(true) expects unordered / monotonic");
+         "shouldInsertFencesForAtomic(true) expects unordered / monotonic");
   if (N->getMemoryVT() == MVT::i32) {
     if (N->getAlign() < Align(4))
       report_fatal_error("atomic load must be aligned");
@@ -967,7 +967,7 @@ LowerATOMIC_STORE(SDValue Op, SelectionDAG &DAG) const {
   assert(N->getOpcode() == ISD::ATOMIC_STORE && "Bad Atomic OP");
   assert((N->getSuccessOrdering() == AtomicOrdering::Unordered ||
           N->getSuccessOrdering() == AtomicOrdering::Monotonic) &&
-         "setInsertFencesForAtomic(true) expects unordered / monotonic");
+         "shouldInsertFencesForAtomic(true) expects unordered / monotonic");
   if (N->getMemoryVT() == MVT::i32) {
     if (N->getAlign() < Align(4))
       report_fatal_error("atomic store must be aligned");