[llvm] [RISCV][SelectionDAG] Sign extend splats of i32 in getConstant on RV64 (PR #67027)

[Craig Topper via llvm-commits]

topperc wrote:

> > > This seems reasonable, but I'd like a second opinion from someone more knowledgeable. Maybe @topperc?
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> > I'm not opposed to this patch.
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> > The other thought I have would be to add all of the vector .vx pseudoinstructions to hasAllNBitUsers in RISCVISelDAGToDAG.cpp. When we do constant materialization we call that to see if the upper bits of the immediate are used.
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> Would we would need a way to tell if the user is being used as a "element" operand in the pseudo, e.g. so we don't assume the x in vslidedown.vx is truncated to SEW?

Yes but that's already something that function does for other instructions. For example the pointer operand of the scalar store SW demands all bits but the data operand only demands the lower 32 bits.

https://github.com/llvm/llvm-project/pull/67027