[llvm] [RISCV] Support floating point VCIX (PR #67094)

[Kito Cheng via llvm-commits]

https://github.com/kito-cheng commented:

The target is support LLVM IR part only, we would like to prevent expose that on the C intrinsic level if possible, because that's intentionally to expose vector with unsigned integer only.

https://github.com/llvm/llvm-project/pull/67094