[llvm] [RISCV][GISel] Implement instruction selection for G_PHI and G_BRCOND. (PR #66970)

[Amara Emerson via llvm-commits]

================
@@ -205,6 +231,15 @@ bool RISCVInstructionSelector::select(MachineInstr &MI) {
     if (!selectConstant(MI, MIB, MRI))
       return false;
     break;
+  case TargetOpcode::G_BRCOND: {
+    // TODO: Fold with G_ICMP.
+    auto Bcc = MIB.buildInstr(RISCV::BNE)
+      .addReg(MI.getOperand(0).getReg())
+      .addReg(RISCV::X0)
+      .addMBB(MI.getOperand(1).getMBB());
----------------
aemerson wrote:

I think you can do something like this:
```
  auto Bcc =
      MIB.buildInstr(RISCV::BNE, {}, {MI.getOperand(0), Register(RISCV::X0)})
          .addMBB(MI.getOperand(1).getMBB());
```
MachineIRBuilder's `SrcOp` can interpret MachineOperands as register implicitly. You can also pass it `RegisterClass`es if you need to implicitly create a vreg.

https://github.com/llvm/llvm-project/pull/66970