[PATCH] D159533: [DAG] getNode() - fold (zext (trunc x)) -> x iff the upper bits are known zero - add SRL support

Jeffrey Byrnes via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 21 08:59:46 PDT 2023

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jrbyrnes added a comment.

Thanks -- the AMDGPUISD::PERM side LGTM


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D159533/new/

https://reviews.llvm.org/D159533

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