[llvm] CostModel/RISCV: add test for ctpop, with/without ZVBB (PR #67013)

[Ramkumar Ramachandra via llvm-commits]

https://github.com/artagnon created https://github.com/llvm/llvm-project/pull/67013

Vector ctpop only exists under ZVBB, but ZVBB is unaccounted for in the cost-model of ctpop. Document this defect with a test, showing identical costs with/without ZVBB. A follow-up patch could fix this defect.

>From cde07205b1b6a4d02675947c673ebeeda765c3fc Mon Sep 17 00:00:00 2001
From: Ramkumar Ramachandra <Ramkumar.Ramachandra at imgtec.com>
Date: Thu, 21 Sep 2023 13:30:27 +0100
Subject: [PATCH] CostModel/RISCV: add test for ctpop, with/without ZVBB

Vector ctpop only exists under ZVBB, but ZVBB is unaccounted for in the
cost-model of ctpop. Document this defect with a test, showing identical
costs with/without ZVBB. A follow-up patch could fix this defect.
---
 llvm/test/Analysis/CostModel/RISCV/ctpop.ll | 95 +++++++++++++++++++++
 1 file changed, 95 insertions(+)
 create mode 100644 llvm/test/Analysis/CostModel/RISCV/ctpop.ll

diff --git a/llvm/test/Analysis/CostModel/RISCV/ctpop.ll b/llvm/test/Analysis/CostModel/RISCV/ctpop.ll
new file mode 100644
index 000000000000000..871d5f2e4ca1cbe
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/RISCV/ctpop.ll
@@ -0,0 +1,95 @@
+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
+; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -S -mtriple=riscv64 -mattr=+v,+experimental-zvbb -riscv-v-vector-bits-min=-1 | FileCheck %s --check-prefix=ZVBB
+; Vector ctpop only exists under zvbb
+; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -S -mtriple=riscv64 -mattr=+v -riscv-v-vector-bits-min=-1 | FileCheck %s --check-prefix=NOZVBB
+
+define void @ctpop() {
+; ZVBB-LABEL: 'ctpop'
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %1 = call i8 @llvm.ctpop.i8(i8 undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %2 = call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %3 = call <4 x i8> @llvm.ctpop.v4i8(<4 x i8> undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %4 = call <8 x i8> @llvm.ctpop.v8i8(<8 x i8> undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %5 = call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %6 = call i16 @llvm.ctpop.i16(i16 undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 19 for instruction: %7 = call <2 x i16> @llvm.ctpop.v2i16(<2 x i16> undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 19 for instruction: %8 = call <4 x i16> @llvm.ctpop.v4i16(<4 x i16> undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 19 for instruction: %9 = call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 19 for instruction: %10 = call <16 x i16> @llvm.ctpop.v16i16(<16 x i16> undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %11 = call i32 @llvm.ctpop.i32(i32 undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %12 = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %13 = call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %14 = call <8 x i32> @llvm.ctpop.v8i32(<8 x i32> undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %15 = call <16 x i32> @llvm.ctpop.v16i32(<16 x i32> undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %16 = call i64 @llvm.ctpop.i64(i64 undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 21 for instruction: %17 = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 21 for instruction: %18 = call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 21 for instruction: %19 = call <8 x i64> @llvm.ctpop.v8i64(<8 x i64> undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 21 for instruction: %20 = call <16 x i64> @llvm.ctpop.v16i64(<16 x i64> undef)
+; ZVBB-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
+;
+; NOZVBB-LABEL: 'ctpop'
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %1 = call i8 @llvm.ctpop.i8(i8 undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %2 = call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %3 = call <4 x i8> @llvm.ctpop.v4i8(<4 x i8> undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %4 = call <8 x i8> @llvm.ctpop.v8i8(<8 x i8> undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %5 = call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %6 = call i16 @llvm.ctpop.i16(i16 undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 19 for instruction: %7 = call <2 x i16> @llvm.ctpop.v2i16(<2 x i16> undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 19 for instruction: %8 = call <4 x i16> @llvm.ctpop.v4i16(<4 x i16> undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 19 for instruction: %9 = call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 19 for instruction: %10 = call <16 x i16> @llvm.ctpop.v16i16(<16 x i16> undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %11 = call i32 @llvm.ctpop.i32(i32 undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %12 = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %13 = call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %14 = call <8 x i32> @llvm.ctpop.v8i32(<8 x i32> undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %15 = call <16 x i32> @llvm.ctpop.v16i32(<16 x i32> undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %16 = call i64 @llvm.ctpop.i64(i64 undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 21 for instruction: %17 = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 21 for instruction: %18 = call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 21 for instruction: %19 = call <8 x i64> @llvm.ctpop.v8i64(<8 x i64> undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 21 for instruction: %20 = call <16 x i64> @llvm.ctpop.v16i64(<16 x i64> undef)
+; NOZVBB-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
+;
+  call i8 @llvm.ctpop.i8(i8 undef)
+  call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> undef)
+  call <4 x i8> @llvm.ctpop.v4i8(<4 x i8> undef)
+  call <8 x i8> @llvm.ctpop.v8i8(<8 x i8> undef)
+  call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> undef)
+  call i16 @llvm.ctpop.i16(i16 undef)
+  call <2 x i16> @llvm.ctpop.v2i16(<2 x i16> undef)
+  call <4 x i16> @llvm.ctpop.v4i16(<4 x i16> undef)
+  call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> undef)
+  call <16 x i16> @llvm.ctpop.v16i16(<16 x i16> undef)
+  call i32 @llvm.ctpop.i32(i32 undef)
+  call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> undef)
+  call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> undef)
+  call <8 x i32> @llvm.ctpop.v8i32(<8 x i32> undef)
+  call <16 x i32> @llvm.ctpop.v16i32(<16 x i32> undef)
+  call i64 @llvm.ctpop.i64(i64 undef)
+  call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> undef)
+  call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> undef)
+  call <8 x i64> @llvm.ctpop.v8i64(<8 x i64> undef)
+  call <16 x i64> @llvm.ctpop.v16i64(<16 x i64> undef)
+  ret void
+}
+
+declare i8 @llvm.ctpop.i8(i8)
+declare <2 x i8> @llvm.ctpop.v2i8(<2 x i8>)
+declare <4 x i8> @llvm.ctpop.v4i8(<4 x i8>)
+declare <8 x i8> @llvm.ctpop.v8i8(<8 x i8>)
+declare <16 x i8> @llvm.ctpop.v16i8(<16 x i8>)
+declare i16 @llvm.ctpop.i16(i16)
+declare <2 x i16> @llvm.ctpop.v2i16(<2 x i16>)
+declare <4 x i16> @llvm.ctpop.v4i16(<4 x i16>)
+declare <8 x i16> @llvm.ctpop.v8i16(<8 x i16>)
+declare <16 x i16> @llvm.ctpop.v16i16(<16 x i16>)
+declare i32 @llvm.ctpop.i32(i32)
+declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>)
+declare <4 x i32> @llvm.ctpop.v4i32(<4 x i32>)
+declare <8 x i32> @llvm.ctpop.v8i32(<8 x i32>)
+declare <16 x i32> @llvm.ctpop.v16i32(<16 x i32>)
+declare i64 @llvm.ctpop.i64(i64)
+declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>)
+declare <4 x i64> @llvm.ctpop.v4i64(<4 x i64>)
+declare <8 x i64> @llvm.ctpop.v8i64(<8 x i64>)
+declare <16 x i64> @llvm.ctpop.v16i64(<16 x i64>)