[llvm] [SPIRV] Implement log10 for logical SPIR-V (PR #66921)

Nathan Gauër via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 21 03:09:14 PDT 2023


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@@ -260,8 +260,18 @@ Register SPIRVGlobalRegistry::buildConstantFP(APFloat Val,
     MF.getRegInfo().setRegClass(Res, &SPIRV::IDRegClass);
     assignTypeToVReg(LLVMFPTy, Res, MIRBuilder);
     DT.add(ConstFP, &MF, Res);
-    MIRBuilder.buildFConstant(Res, *ConstFP);
+    if (EmitIR) {
+      MIRBuilder.buildFConstant(Res, *ConstFP);
+    } else {
----------------
Keenuts wrote:

I'm not sure I follow the full context here:
Once this MIR is generated, all the instructions are lowers to actual SPIR-V instructions in the final printers.
So here, if we generate the FConstant or the OpConstantF, what difference does it makes?
Is it to make sure the SPIR-V types remains exactly the one we passed, and don't leave the choice to the code lowering MIR to final SPIR-V?

https://github.com/llvm/llvm-project/pull/66921


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