[llvm] [RISCV] Combine vslideup_vl with known VL to a smaller LMUL (PR #66671)

[Philip Reames via llvm-commits]

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@@ -811,9 +811,11 @@ define i64 @explode_4xi64(<4 x i64> %v) {
 ; RV32-NEXT:    vsrl.vx v10, v8, a0
 ; RV32-NEXT:    vmv.x.s a1, v10
 ; RV32-NEXT:    vmv.x.s a2, v8
+; RV32-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
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preames wrote:

This looks like the consequence of the vslidedown combine, but in a vslideup change.  I think maybe you got the rebase wrong?

https://github.com/llvm/llvm-project/pull/66671