[llvm] [AArch64][SVE2] Do not emit RSHRNB for large shifts (PR #66672)

[Matthew Devereau via llvm-commits]

================
@@ -20241,6 +20241,10 @@ static SDValue trySimplifySrlAddToRshrnb(SDValue Srl, SelectionDAG &DAG,
     return SDValue();
   unsigned ShiftValue = SrlOp1->getZExtValue();
 
+  uint64_t EltSize = ResVT.getScalarSizeInBits();
+  if (ShiftValue > EltSize)
----------------
MDevereau wrote:

Thanks. I've now just gone with
```c++
  if (ShiftValue < 1 || ShiftValue > ResVT.getScalarSizeInBits())
    return SDValue();
``` 

https://github.com/llvm/llvm-project/pull/66672