[llvm] [VE] Add unittest for intrinsics (PR #66730)

[Erich Focht via llvm-commits]

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@@ -0,0 +1,315 @@
+//===- MachineInstrTest.cpp -----------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "VEInstrInfo.h"
+#include "VESubtarget.h"
+#include "VETargetMachine.h"
+#include "llvm/MC/TargetRegistry.h"
+#include "llvm/Support/TargetSelect.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetOptions.h"
+
+#include "gtest/gtest.h"
+
+using namespace llvm;
+
+TEST(VETest, VLIndex) {
+  using namespace VE;
+
+  // Return expected VL register index in each MI's operands.  Aurora VE has
+  // multiple instruction formats for each instruction.  So, we defines
+  // instructions hierarchically and tests a part of whole instructions.
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efocht wrote:

The last sentence should be fixed. For example:
"So, we define instructions hierarchically and test parts of the whole instruction."

https://github.com/llvm/llvm-project/pull/66730