[llvm] [BOLT] Improve handling of relocations targeting specific instructions (PR #66395)

[Job Noorman via llvm-commits]

mtvec wrote:

No, that isn't possible. For one, the linker needs a `R_RISCV_PCREL_LO12_I` reloc to do its job and the only way to make the backend generate one is to add a `MCSymbolRefExpr` that refers to the first instruction.

Another issue is that the offset isn't always -4. I'm actually generating code like this:
```
1: auipc t0, %pcrel_hi(counter)
ld t1, %pcrel_lo(1b)(t0)
addi t1, t1, 1
sd t1, %pcrel_lo(1b)(t0)
```

So the `sd` refers to the same `auipc` as the earlier `ld`.

https://github.com/llvm/llvm-project/pull/66395