[PATCH] D156939: [AMDGPU][True16] Support disassembling .h registers.

Tue Sep 19 11:00:14 PDT 2023

rampitec added inline comments.

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Comment at: llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp:506

-  unsigned Reg = TRI->getEncodingValue(AMDGPU::getMCReg(Op.getReg(), *ST));
+  unsigned Reg = TRI->getEncodingValue(AMDGPU::getMCReg(Op.getReg(), *ST)) &
+                 AMDGPU::EncValues::REG_IDX_MASK;
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Why not to call `TRI->getHWRegIndex(AMDGPU::getMCReg(Op.getReg(), *ST))` here and remove any dependency on the encoding?

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Comment at: llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2.txt:70
+# GFX11-REAL16: v_add_f16_e32 v5.l, v1.h, v2.l   ; encoding: [0x81,0x05,0x0a,0x64]
+# GFX11-FAKE16: v_add_f16_e32 v5, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x0a,0x64]
+0x81,0x05,0x0a,0x64
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Does it just break fake16 and these can be removed completely at this point?

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D156939/new/

https://reviews.llvm.org/D156939