[PATCH] D158062: [RISCV] Teach RISCVMergeBaseOffset to handle inline asm
Wang Pengcheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 18 22:38:58 PDT 2023
wangpc updated this revision to Diff 556997.
wangpc added a comment.
- Rebase.
- Don't optimize for constraint A.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D158062/new/
https://reviews.llvm.org/D158062
Files:
llvm/include/llvm/CodeGen/MachineOperand.h
llvm/lib/CodeGen/MachineOperand.cpp
llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll
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