[llvm] 4ea883c - [InstCombine] Add pre-commit tests for PR66606. NFC.

[Yingwei Zheng via llvm-commits]

Author: Yingwei Zheng
Date: 2023-09-19T11:13:16+08:00
New Revision: 4ea883cbbbddc6374f1d54619fb6c8f5aea8bcdc

URL: https://github.com/llvm/llvm-project/commit/4ea883cbbbddc6374f1d54619fb6c8f5aea8bcdc
DIFF: https://github.com/llvm/llvm-project/commit/4ea883cbbbddc6374f1d54619fb6c8f5aea8bcdc.diff

LOG: [InstCombine] Add pre-commit tests for PR66606. NFC.

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/and.ll
    llvm/test/Transforms/InstSimplify/and-or-icmp-zero.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/and.ll b/llvm/test/Transforms/InstCombine/and.ll
index 3e2adcbb71c5bc9..7ec4b0dbb0a12f0 100644
--- a/llvm/test/Transforms/InstCombine/and.ll
+++ b/llvm/test/Transforms/InstCombine/and.ll
@@ -2440,3 +2440,102 @@ define i64 @test_and_or_constexpr_infloop() {
   %or = or i64 %and, 1
   ret i64 %or
 }
+
+define i32 @and_zext(i32 %a, i1 %b) {
+; CHECK-LABEL: @and_zext(
+; CHECK-NEXT:    [[MASK:%.*]] = zext i1 [[B:%.*]] to i32
+; CHECK-NEXT:    [[R:%.*]] = and i32 [[MASK]], [[A:%.*]]
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %mask = zext i1 %b to i32
+  %r = and i32 %a, %mask
+  ret i32 %r
+}
+
+define i32 @and_zext_commuted(i32 %a, i1 %b) {
+; CHECK-LABEL: @and_zext_commuted(
+; CHECK-NEXT:    [[MASK:%.*]] = zext i1 [[B:%.*]] to i32
+; CHECK-NEXT:    [[R:%.*]] = and i32 [[MASK]], [[A:%.*]]
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %mask = zext i1 %b to i32
+  %r = and i32 %mask, %a
+  ret i32 %r
+}
+
+define i32 @and_zext_multiuse(i32 %a, i1 %b) {
+; CHECK-LABEL: @and_zext_multiuse(
+; CHECK-NEXT:    [[MASK:%.*]] = zext i1 [[B:%.*]] to i32
+; CHECK-NEXT:    call void @use32(i32 [[MASK]])
+; CHECK-NEXT:    [[R:%.*]] = and i32 [[MASK]], [[A:%.*]]
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %mask = zext i1 %b to i32
+  call void @use32(i32 %mask)
+  %r = and i32 %a, %mask
+  ret i32 %r
+}
+
+define <2 x i32> @and_zext_vec(<2 x i32> %a, <2 x i1> %b) {
+; CHECK-LABEL: @and_zext_vec(
+; CHECK-NEXT:    [[MASK:%.*]] = zext <2 x i1> [[B:%.*]] to <2 x i32>
+; CHECK-NEXT:    [[R:%.*]] = and <2 x i32> [[MASK]], [[A:%.*]]
+; CHECK-NEXT:    ret <2 x i32> [[R]]
+;
+  %mask = zext <2 x i1> %b to <2 x i32>
+  %r = and <2 x i32> %a, %mask
+  ret <2 x i32> %r
+}
+
+; tests from PR66606
+define i32 @and_zext_eq_even(i32 %a) {
+; CHECK-LABEL: @and_zext_eq_even(
+; CHECK-NEXT:    [[COND:%.*]] = icmp eq i32 [[A:%.*]], 2
+; CHECK-NEXT:    [[NOT:%.*]] = zext i1 [[COND]] to i32
+; CHECK-NEXT:    [[R:%.*]] = and i32 [[NOT]], [[A]]
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %cond = icmp eq i32 %a, 2
+  %not = zext i1 %cond to i32
+  %r = and i32 %a, %not
+  ret i32 %r
+}
+
+define i32 @and_zext_eq_even_commuted(i32 %a) {
+; CHECK-LABEL: @and_zext_eq_even_commuted(
+; CHECK-NEXT:    [[COND:%.*]] = icmp eq i32 [[A:%.*]], 2
+; CHECK-NEXT:    [[NOT:%.*]] = zext i1 [[COND]] to i32
+; CHECK-NEXT:    [[R:%.*]] = and i32 [[NOT]], [[A]]
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %cond = icmp eq i32 %a, 2
+  %not = zext i1 %cond to i32
+  %r = and i32 %not, %a
+  ret i32 %r
+}
+
+define i32 @and_zext_eq_odd(i32 %a) {
+; CHECK-LABEL: @and_zext_eq_odd(
+; CHECK-NEXT:    [[COND:%.*]] = icmp eq i32 [[A:%.*]], 3
+; CHECK-NEXT:    [[NOT:%.*]] = zext i1 [[COND]] to i32
+; CHECK-NEXT:    [[R:%.*]] = and i32 [[NOT]], [[A]]
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %cond = icmp eq i32 %a, 3
+  %not = zext i1 %cond to i32
+  %r = and i32 %a, %not
+  ret i32 %r
+}
+
+define i32 @and_zext_eq_odd_commuted(i32 %a) {
+; CHECK-LABEL: @and_zext_eq_odd_commuted(
+; CHECK-NEXT:    [[COND:%.*]] = icmp eq i32 [[A:%.*]], 3
+; CHECK-NEXT:    [[NOT:%.*]] = zext i1 [[COND]] to i32
+; CHECK-NEXT:    [[R:%.*]] = and i32 [[NOT]], [[A]]
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %cond = icmp eq i32 %a, 3
+  %not = zext i1 %cond to i32
+  %r = and i32 %not, %a
+  ret i32 %r
+}

diff  --git a/llvm/test/Transforms/InstSimplify/and-or-icmp-zero.ll b/llvm/test/Transforms/InstSimplify/and-or-icmp-zero.ll
index 3e50a5968b46087..d4e0d776391aebc 100644
--- a/llvm/test/Transforms/InstSimplify/and-or-icmp-zero.ll
+++ b/llvm/test/Transforms/InstSimplify/and-or-icmp-zero.ll
@@ -261,30 +261,3 @@ define i1 @and_cmps_ptr_eq_zero_with_mask_commute4(ptr %p, i64 %y) {
   %r = and i1 %isnotnull, %somebits_are_not_zero
   ret i1 %r
 }
-
-; tests from PR66606
-define i32 @and_zext_eq_zero(i32 %a) {
-; CHECK-LABEL: @and_zext_eq_zero(
-; CHECK-NEXT:    [[COND:%.*]] = icmp eq i32 [[A:%.*]], 0
-; CHECK-NEXT:    [[NOT:%.*]] = zext i1 [[COND]] to i32
-; CHECK-NEXT:    [[R:%.*]] = and i32 [[A]], [[NOT]]
-; CHECK-NEXT:    ret i32 [[R]]
-;
-  %cond = icmp eq i32 %a, 0
-  %not = zext i1 %cond to i32
-  %r = and i32 %a, %not
-  ret i32 %r
-}
-
-define i32 @and_zext_eq_zero_commuted(i32 %a) {
-; CHECK-LABEL: @and_zext_eq_zero_commuted(
-; CHECK-NEXT:    [[COND:%.*]] = icmp eq i32 [[A:%.*]], 0
-; CHECK-NEXT:    [[NOT:%.*]] = zext i1 [[COND]] to i32
-; CHECK-NEXT:    [[R:%.*]] = and i32 [[NOT]], [[A]]
-; CHECK-NEXT:    ret i32 [[R]]
-;
-  %cond = icmp eq i32 %a, 0
-  %not = zext i1 %cond to i32
-  %r = and i32 %not, %a
-  ret i32 %r
-}