[llvm] 13a74d6 - [RISCV] Fix crash when legalizing mgather/scatter on rv32
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 18 08:37:03 PDT 2023
Author: Philip Reames
Date: 2023-09-18T08:36:23-07:00
New Revision: 13a74d6cc862db4fd5df46bf3724fc917e321aa6
URL: https://github.com/llvm/llvm-project/commit/13a74d6cc862db4fd5df46bf3724fc917e321aa6
DIFF: https://github.com/llvm/llvm-project/commit/13a74d6cc862db4fd5df46bf3724fc917e321aa6.diff
LOG: [RISCV] Fix crash when legalizing mgather/scatter on rv32
This is a fix for a subset of legalization problems around 64 bit indices on
rv32 targets. For RV32+V, we were using the wrong mask type for the manual
truncation lowering for fixed length vectors. Instead, just use the generic
TRUNCATE node, and let it be lowered as needed.
Note that legalization is still broken for rv32+zve32. That appears to be
a different issue.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 52b19ce7a228dbe..de58335b435651c 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -10116,10 +10116,7 @@ SDValue RISCVTargetLowering::lowerMaskedGather(SDValue Op,
if (XLenVT == MVT::i32 && IndexVT.getVectorElementType().bitsGT(XLenVT)) {
IndexVT = IndexVT.changeVectorElementType(XLenVT);
- SDValue TrueMask = DAG.getNode(RISCVISD::VMSET_VL, DL, Mask.getValueType(),
- VL);
- Index = DAG.getNode(RISCVISD::TRUNCATE_VECTOR_VL, DL, IndexVT, Index,
- TrueMask, VL);
+ Index = DAG.getNode(ISD::TRUNCATE, DL, IndexVT, Index);
}
unsigned IntID =
@@ -10218,10 +10215,7 @@ SDValue RISCVTargetLowering::lowerMaskedScatter(SDValue Op,
if (XLenVT == MVT::i32 && IndexVT.getVectorElementType().bitsGT(XLenVT)) {
IndexVT = IndexVT.changeVectorElementType(XLenVT);
- SDValue TrueMask = DAG.getNode(RISCVISD::VMSET_VL, DL, Mask.getValueType(),
- VL);
- Index = DAG.getNode(RISCVISD::TRUNCATE_VECTOR_VL, DL, IndexVT, Index,
- TrueMask, VL);
+ Index = DAG.getNode(ISD::TRUNCATE, DL, IndexVT, Index);
}
unsigned IntID =
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