[llvm] dc11814 - [InstCombine] Add pre-commit tests for PR65073. NFC.
Yingwei Zheng via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 18 07:27:47 PDT 2023
Author: Yingwei Zheng
Date: 2023-09-18T22:27:05+08:00
New Revision: dc118147f24e3aa68632a88889d94b32a18c0204
URL: https://github.com/llvm/llvm-project/commit/dc118147f24e3aa68632a88889d94b32a18c0204
DIFF: https://github.com/llvm/llvm-project/commit/dc118147f24e3aa68632a88889d94b32a18c0204.diff
LOG: [InstCombine] Add pre-commit tests for PR65073. NFC.
Added:
Modified:
llvm/test/Transforms/InstCombine/icmp-range.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/icmp-range.ll b/llvm/test/Transforms/InstCombine/icmp-range.ll
index 4281e09cb0309c8..a26e760059b43fe 100644
--- a/llvm/test/Transforms/InstCombine/icmp-range.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-range.ll
@@ -1034,6 +1034,228 @@ define i1 @icmp_ne_bool_1(ptr %ptr) {
ret i1 %cmp
}
+; Tests from PR65073
+define i1 @icmp_ne_zext_eq_zero(i32 %a) {
+; CHECK-LABEL: @icmp_ne_zext_eq_zero(
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], 0
+; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i32 [[CONV]], [[A]]
+; CHECK-NEXT: ret i1 [[CMP1]]
+;
+ %cmp = icmp eq i32 %a, 0
+ %conv = zext i1 %cmp to i32
+ %cmp1 = icmp ne i32 %conv, %a
+ ret i1 %cmp1
+}
+
+define i1 @icmp_ne_zext_ne_zero(i32 %a) {
+; CHECK-LABEL: @icmp_ne_zext_ne_zero(
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A:%.*]], 0
+; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i32 [[CONV]], [[A]]
+; CHECK-NEXT: ret i1 [[CMP1]]
+;
+ %cmp = icmp ne i32 %a, 0
+ %conv = zext i1 %cmp to i32
+ %cmp1 = icmp ne i32 %conv, %a
+ ret i1 %cmp1
+}
+
+define i1 @icmp_eq_zext_eq_zero(i32 %a) {
+; CHECK-LABEL: @icmp_eq_zext_eq_zero(
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], 0
+; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[CONV]], [[A]]
+; CHECK-NEXT: ret i1 [[CMP1]]
+;
+ %cmp = icmp eq i32 %a, 0
+ %conv = zext i1 %cmp to i32
+ %cmp1 = icmp eq i32 %conv, %a
+ ret i1 %cmp1
+}
+
+define i1 @icmp_eq_zext_ne_zero(i32 %a) {
+; CHECK-LABEL: @icmp_eq_zext_ne_zero(
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A:%.*]], 0
+; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[CONV]], [[A]]
+; CHECK-NEXT: ret i1 [[CMP1]]
+;
+ %cmp = icmp ne i32 %a, 0
+ %conv = zext i1 %cmp to i32
+ %cmp1 = icmp eq i32 %conv, %a
+ ret i1 %cmp1
+}
+
+define i1 @icmp_ne_zext_eq_one(i32 %a) {
+; CHECK-LABEL: @icmp_ne_zext_eq_one(
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], 1
+; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i32 [[CONV]], [[A]]
+; CHECK-NEXT: ret i1 [[CMP1]]
+;
+ %cmp = icmp eq i32 %a, 1
+ %conv = zext i1 %cmp to i32
+ %cmp1 = icmp ne i32 %conv, %a
+ ret i1 %cmp1
+}
+
+define i1 @icmp_ne_zext_ne_one(i32 %a) {
+; CHECK-LABEL: @icmp_ne_zext_ne_one(
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A:%.*]], 1
+; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i32 [[CONV]], [[A]]
+; CHECK-NEXT: ret i1 [[CMP1]]
+;
+ %cmp = icmp ne i32 %a, 1
+ %conv = zext i1 %cmp to i32
+ %cmp1 = icmp ne i32 %conv, %a
+ ret i1 %cmp1
+}
+
+define i1 @icmp_eq_zext_eq_one(i32 %a) {
+; CHECK-LABEL: @icmp_eq_zext_eq_one(
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], 1
+; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[CONV]], [[A]]
+; CHECK-NEXT: ret i1 [[CMP1]]
+;
+ %cmp = icmp eq i32 %a, 1
+ %conv = zext i1 %cmp to i32
+ %cmp1 = icmp eq i32 %conv, %a
+ ret i1 %cmp1
+}
+
+define i1 @icmp_eq_zext_ne_one(i32 %a) {
+; CHECK-LABEL: @icmp_eq_zext_ne_one(
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A:%.*]], 1
+; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[CONV]], [[A]]
+; CHECK-NEXT: ret i1 [[CMP1]]
+;
+ %cmp = icmp ne i32 %a, 1
+ %conv = zext i1 %cmp to i32
+ %cmp1 = icmp eq i32 %conv, %a
+ ret i1 %cmp1
+}
+
+define i1 @icmp_ne_zext_eq_non_boolean(i32 %a) {
+; CHECK-LABEL: @icmp_ne_zext_eq_non_boolean(
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], 2
+; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i32 [[CONV]], [[A]]
+; CHECK-NEXT: ret i1 [[CMP1]]
+;
+ %cmp = icmp eq i32 %a, 2
+ %conv = zext i1 %cmp to i32
+ %cmp1 = icmp ne i32 %conv, %a
+ ret i1 %cmp1
+}
+
+define i1 @icmp_ne_zext_ne_non_boolean(i32 %a) {
+; CHECK-LABEL: @icmp_ne_zext_ne_non_boolean(
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A:%.*]], 2
+; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i32 [[CONV]], [[A]]
+; CHECK-NEXT: ret i1 [[CMP1]]
+;
+ %cmp = icmp ne i32 %a, 2
+ %conv = zext i1 %cmp to i32
+ %cmp1 = icmp ne i32 %conv, %a
+ ret i1 %cmp1
+}
+
+define i1 @icmp_eq_zext_eq_non_boolean(i32 %a) {
+; CHECK-LABEL: @icmp_eq_zext_eq_non_boolean(
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], 2
+; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[CONV]], [[A]]
+; CHECK-NEXT: ret i1 [[CMP1]]
+;
+ %cmp = icmp eq i32 %a, 2
+ %conv = zext i1 %cmp to i32
+ %cmp1 = icmp eq i32 %conv, %a
+ ret i1 %cmp1
+}
+
+define i1 @icmp_eq_zext_ne_non_boolean(i32 %a) {
+; CHECK-LABEL: @icmp_eq_zext_ne_non_boolean(
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A:%.*]], 2
+; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[CONV]], [[A]]
+; CHECK-NEXT: ret i1 [[CMP1]]
+;
+ %cmp = icmp ne i32 %a, 2
+ %conv = zext i1 %cmp to i32
+ %cmp1 = icmp eq i32 %conv, %a
+ ret i1 %cmp1
+}
+
+define <2 x i1> @icmp_ne_zext_eq_zero_vec(<2 x i32> %a) {
+; CHECK-LABEL: @icmp_ne_zext_eq_zero_vec(
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[A:%.*]], zeroinitializer
+; CHECK-NEXT: [[CONV:%.*]] = zext <2 x i1> [[CMP]] to <2 x i32>
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne <2 x i32> [[CONV]], [[A]]
+; CHECK-NEXT: ret <2 x i1> [[CMP1]]
+;
+ %cmp = icmp eq <2 x i32> %a, <i32 0, i32 0>
+ %conv = zext <2 x i1> %cmp to <2 x i32>
+ %cmp1 = icmp ne <2 x i32> %conv, %a
+ ret <2 x i1> %cmp1
+}
+
+define <2 x i1> @icmp_ne_zext_ne_zero_vec(<2 x i32> %a) {
+; CHECK-LABEL: @icmp_ne_zext_ne_zero_vec(
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[A:%.*]], zeroinitializer
+; CHECK-NEXT: [[CONV:%.*]] = zext <2 x i1> [[CMP]] to <2 x i32>
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne <2 x i32> [[CONV]], [[A]]
+; CHECK-NEXT: ret <2 x i1> [[CMP1]]
+;
+ %cmp = icmp ne <2 x i32> %a, <i32 0, i32 0>
+ %conv = zext <2 x i1> %cmp to <2 x i32>
+ %cmp1 = icmp ne <2 x i32> %conv, %a
+ ret <2 x i1> %cmp1
+}
+
+define <2 x i1> @icmp_ne_zext_eq_one_vec(<2 x i32> %a) {
+; CHECK-LABEL: @icmp_ne_zext_eq_one_vec(
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[A:%.*]], <i32 1, i32 1>
+; CHECK-NEXT: [[CONV:%.*]] = zext <2 x i1> [[CMP]] to <2 x i32>
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne <2 x i32> [[CONV]], [[A]]
+; CHECK-NEXT: ret <2 x i1> [[CMP1]]
+;
+ %cmp = icmp eq <2 x i32> %a, <i32 1, i32 1>
+ %conv = zext <2 x i1> %cmp to <2 x i32>
+ %cmp1 = icmp ne <2 x i32> %conv, %a
+ ret <2 x i1> %cmp1
+}
+
+define <2 x i1> @icmp_ne_zext_ne_one_vec(<2 x i32> %a) {
+; CHECK-LABEL: @icmp_ne_zext_ne_one_vec(
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[A:%.*]], <i32 1, i32 1>
+; CHECK-NEXT: [[CONV:%.*]] = zext <2 x i1> [[CMP]] to <2 x i32>
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne <2 x i32> [[CONV]], [[A]]
+; CHECK-NEXT: ret <2 x i1> [[CMP1]]
+;
+ %cmp = icmp ne <2 x i32> %a, <i32 1, i32 1>
+ %conv = zext <2 x i1> %cmp to <2 x i32>
+ %cmp1 = icmp ne <2 x i32> %conv, %a
+ ret <2 x i1> %cmp1
+}
+
+define <2 x i1> @icmp_ne_zext_eq_non_boolean_vec(<2 x i32> %a) {
+; CHECK-LABEL: @icmp_ne_zext_eq_non_boolean_vec(
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[A:%.*]], <i32 2, i32 2>
+; CHECK-NEXT: [[CONV:%.*]] = zext <2 x i1> [[CMP]] to <2 x i32>
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne <2 x i32> [[CONV]], [[A]]
+; CHECK-NEXT: ret <2 x i1> [[CMP1]]
+;
+ %cmp = icmp eq <2 x i32> %a, <i32 2, i32 2>
+ %conv = zext <2 x i1> %cmp to <2 x i32>
+ %cmp1 = icmp ne <2 x i32> %conv, %a
+ ret <2 x i1> %cmp1
+}
+
!0 = !{i32 1, i32 6}
!1 = !{i32 0, i32 6}
!2 = !{i8 0, i8 1}
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