[llvm] [mlir][bufferization] Empty tensor elimination for materialize_in_destination (PR #65468)

[Nicolas Vasilache via llvm-commits]

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@@ -0,0 +1,103 @@
+//===-- InferDestinationOpInterface.td - Infer destination -*- tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef INFER_DESTINATION_OP_INTERFACE
+#define INFER_DESTINATION_OP_INTERFACE
+
+include "mlir/IR/OpBase.td"
+
+def InferDestinationOpInterface : OpInterface<"InferDestinationOpInterface"> {
+  let description = [{
+    This interface can be implemented by ops that read data from an "input"
+    tensor and store the result into an "output"/"init" tensor (i.e., the
+    "destination" tensor). It drives the empty tensor elimination pass.
+
+    The `getOrBuildDestination` interface method returns the destination tensor
+    (or a slice thereof). Assuming that the op does not bufferize to a memory
+    read on the destination tensor (or the aforementioned slice), if the source
+    originates from a "tensor.empty", that "tensor.empty" can be replaced with
+    the result of `getOrBuildDestination`. This can reduce the number of
+    allocations and memcpys during bufferization: instead of computing data in
+    a temporary buffer (the result of "tensor.empty") and then copying it into
+    the destination buffer, the result will be computed in the destination
+    buffer directly.
+
+    Example:
+    ```
+    %0 = tensor.empty() : tensor<5xf32>
+    %1 = linalg.fill ins(%cst : f32) outs(%0 : tensor<5xf32>) -> tensor<5xf32>
+    %2 = tensor.insert_slice %1 into %dst [%offset][5][1]
+        : tensor<5xf32> into tensor<?xf32>
+    ```
+
+    "tensor.insert_slice" transfers %1 into a slice of %dst.
+    `getOrBuildDestination` should the slice. `getNeededValues` should return
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nicolasvasilache wrote:

should "build" the slice 

https://github.com/llvm/llvm-project/pull/65468