[llvm] ce031fc - [AMDGPU] Fix non-deterministic iteration order in SIFixSGPRCopies (#66617)

[via llvm-commits]

Author: David Stuttard
Date: 2023-09-18T10:08:53+01:00
New Revision: ce031fc17a0efc829295ac46c904bbfa4077ef20

URL: https://github.com/llvm/llvm-project/commit/ce031fc17a0efc829295ac46c904bbfa4077ef20
DIFF: https://github.com/llvm/llvm-project/commit/ce031fc17a0efc829295ac46c904bbfa4077ef20.diff

LOG: [AMDGPU] Fix non-deterministic iteration order in SIFixSGPRCopies (#66617)

Use of DenseSet was causing some non-deteminism in SIFixSGPRSopies. Changing
to SetVector fixes the problem.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
index 32da233fe4d8896..2216acf128bfa56 100644
--- a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
@@ -88,7 +88,7 @@ class V2SCopyInfo {
   // VGPR to SGPR copy being processed
   MachineInstr *Copy;
   // All SALU instructions reachable from this copy in SSA graph
-  DenseSet<MachineInstr *> SChain;
+  SetVector<MachineInstr *> SChain;
   // Number of SGPR to VGPR copies that are used to put the SALU computation
   // results back to VALU.
   unsigned NumSVCopies;
@@ -1009,7 +1009,7 @@ void SIFixSGPRCopies::lowerVGPR2SGPRCopies(MachineFunction &MF) {
           V2SCopyInfo &SI = SibInfoIt->getSecond();
           LLVM_DEBUG(dbgs() << "Sibling:\n"; SI.dump());
           if (!SI.NeedToBeConvertedToVALU) {
-            set_subtract(SI.SChain, C.SChain);
+            SI.SChain.set_subtract(C.SChain);
             if (needToBeConvertedToVALU(&SI))
               LoweringWorklist.push_back(SI.ID);
           }