[llvm] d861b31 - [RISCV][NFC] precommit for D159399
Piyou Chen via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 18 00:18:13 PDT 2023
Author: Piyou Chen
Date: 2023-09-18T00:18:08-07:00
New Revision: d861b3183cb0baff81120874a16f22e9a4bc9e60
URL: https://github.com/llvm/llvm-project/commit/d861b3183cb0baff81120874a16f22e9a4bc9e60
DIFF: https://github.com/llvm/llvm-project/commit/d861b3183cb0baff81120874a16f22e9a4bc9e60.diff
LOG: [RISCV][NFC] precommit for D159399
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D159400
Added:
Modified:
llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll b/llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll
index a21cc412fb16146..255176efb4cd17f 100644
--- a/llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll
+++ b/llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll
@@ -34,3 +34,11 @@ define void @test4() {
entry:
ret void
}
+
+; CHECK: .option push
+define void @test5() "target-features"="+unaligned-scalar-mem" {
+; CHECK-LABEL: test5
+; CHECK: .option pop
+entry:
+ ret void
+}
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