[llvm] [RISCV] Combine trunc (sra sext (x), zext (y)) to sra (x, smin (y, scalarsizeinbits(y) - 1)) (PR #65728)
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Sun Sep 17 02:08:57 PDT 2023
LWenH wrote:
> I will merge this pull request after this patch passes all regression tests on my machine (I cannot rerun the failed workflow on buildkite). To obtain commit access, please refer to the developer policy: https://llvm.org/docs/DeveloperPolicy.html#obtaining-commit-access.
Thank you folks, that's a big help for me.
https://github.com/llvm/llvm-project/pull/65728
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