[PATCH] D158163: [RISCV] Narrow types of index operand matched pattern (shl_vl (zext_vl), C)

Philip Reames via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 11 12:54:33 PDT 2023


reames added a comment.

I want to suggest a different approach here.  I think this should be a combine on MGATHER (and variants), not a combine on the RISCV specific nodes.  It might make sense to have this be a target specific combine, but I don't think it needs to be a combine on custom nodes.

Looking at one of your tests, I see this state immediately before lowering:

      t15: v8i64 = zero_extend t6
      t17: v8i64 = BUILD_VECTOR Constant:i64<1>, Constant:i64<1>, Constant:i64<1>, Constant:i64<1>, Constant:i64<1>, Constant:i64<1>, Constant:i64<1>, Constant:i64<1>
    t18: v8i64 = shl t15, t17
  t27: v8i16,ch = masked_gather<(load unknown-size, align 2), signed unscaled offset> t0, t12, t9, t2, t18, TargetConstant:i64<1>

The MGATHER node supports scaled offsets, and allows the index type to differ from the native type (i.e. there's implicit extend on the operand).  The later seems like it's the right tool here.  See refineIndexType in DAGCombine for an example of some code which is related.  Basically, we're just inverting the zero_extend placement, and then running that transform.  We might even be able to do this in fully generic code.



================
Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll:1710
 
 define <8 x i16> @mgather_baseidx_zext_v8i8_v8i16(ptr %base, <8 x i8> %idxs, <8 x i1> %m, <8 x i16> %passthru) {
 ; RV32-LABEL: mgather_baseidx_zext_v8i8_v8i16:
----------------
This is the test I'm referencing in my overall comment.


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