[PATCH] D159215: [RISCV] Fix crash during during i1 vector bitreverse lowering

Wang Pengcheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 30 21:05:55 PDT 2023

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wangpc added a comment.

I was thinking about adding `v1i256`, `v1i512`, etc. Is it feasible?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D159215/new/

https://reviews.llvm.org/D159215

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