[PATCH] D159230: [RISCV] Handle EltType > XLEN case in VMV_V_X_VL to VMV_S_X_VL fold

[Philip Reames via Phabricator via llvm-commits]

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I'd guarded this case in D158874 <https://reviews.llvm.org/D158874> to avoid regressions, and decided to go investigate what was going on.  The solution turns out to be a generic splat matching extension to handle INSERT_SUBVECTOR.  In theory, we could see these from other sources as well, but for some reason we only seem to see the i64 extract on rv32 case in practice.  Not sure why that is to be honest.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D159230

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrol.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vror.ll

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