[PATCH] D158874: [RISCV] Form vmv.s.f/x from single element splats via DAG combine
Philip Reames via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 30 12:35:29 PDT 2023
reames added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td:592
+ [(riscv_vfmv_v_f_vl undef, node:$op, srcvalue),
+ (riscv_vfmv_s_f_vl undef, node:$op, 1)]>;
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craig.topper wrote:
> Why do we check the vl for riscv_vfmv_s_f_vl, but we don't check the VL for RISCVISD::VMV_S_X_VL in selectVSplat?
It doesn't matter either way with the undef pass thru. I'll switch to using srcvalue here, but it causes no test delta.
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D158874/new/
https://reviews.llvm.org/D158874
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