[PATCH] D158874: [RISCV] Form vmv.s.f/x from single element splats via DAG combine

[Luke Lau via Phabricator via llvm-commits]

luke accepted this revision.
luke added a comment.
This revision is now accepted and ready to land.

LGTM



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Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:2971
 
+static bool selectVSplatImmHelper(SDValue N, int64_t &SplatImm) {
+  if (N.getOpcode() != RISCVISD::VMV_V_X_VL &&
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Looks like this was also factored out in https://reviews.llvm.org/D158741, so rebasing this should just be a matter of handling vmv_s_x_vl in `findVSplat` there


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:13918
+        (!Const || isNullConstant(Scalar) || !isInt<5>(Const->getSExtValue())))
+      return DAG.getNode(RISCVISD::VMV_S_X_VL, DL, VT, Passthru, Scalar, VL);
+
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I had a think about how vmv.s.x only writes to one register and not the register group, but couldn't see any issues that would arise with it and this combine.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D158874/new/

https://reviews.llvm.org/D158874