[PATCH] D159080: [mlir][ArmSME] Fix get_tile_id type in zero lowering

[Cullen Rhodes via Phabricator via llvm-commits]

c-rhodes added inline comments.


================
Comment at: mlir/test/Dialect/ArmSME/tile-zero-masks.mlir:6
 
+// This test verifies the 8-bit tile mask operand of the zero intrinsic zeroes
+// the correct tiles. Both integer and floating-point datatypes are checked.
----------------
c-rhodes wrote:
> awarzynski wrote:
> > How is "8-bit" relevant here? What's meant to be 8-bit?
> > How is "8-bit" relevant here? What's meant to be 8-bit?
> 
> the zero instruction mask, see https://armv8.arm.com/latest_builds/v9A/isa64/zero_za_i.xml
> > How is "8-bit" relevant here? What's meant to be 8-bit?
> 
> the zero instruction mask, see https://armv8.arm.com/latest_builds/v9A/isa64/zero_za_i.xml

Apologies that's an internal link, external link: https://developer.arm.com/documentation/ddi0602/2022-06/SME-Instructions/ZERO--Zero-a-list-of-64-bit-element-ZA-tiles-


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D159080/new/

https://reviews.llvm.org/D159080