[PATCH] D158913: [RISCV] Add a cross basic block VXRM write insertion pass.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 28 11:35:19 PDT 2023
craig.topper marked an inline comment as done.
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInsertWriteVXRM.cpp:126
+ /// Implement operator<<.
+ /// @{
+ void print(raw_ostream &OS) const {
----------------
eopXD wrote:
> Is this extra line that was copied from elsewhere?
I copied part of this from vsetvli. Not sure if I there's a mistake there too or I just didn't copy enough.
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Comment at: llvm/lib/Target/RISCV/RISCVInsertWriteVXRM.cpp:211
+ for (const MachineInstr &MI : MBB) {
+ int VXRMIdx = RISCVII::getVXRMOpNum(MI.getDesc());
+ if (VXRMIdx >= 0) {
----------------
eopXD wrote:
> const
I don't see a lot of value in putting `const` on a short lived local variable
================
Comment at: llvm/lib/Target/RISCV/RISCVInsertWriteVXRM.cpp:213
+ if (VXRMIdx >= 0) {
+ unsigned NewVXRMImm = MI.getOperand(VXRMIdx).getImm() & 7;
+ NeedVXRMChange = true;
----------------
eopXD wrote:
> const
I don't see a lot of value in putting `const` on a short lived local variable
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D158913/new/
https://reviews.llvm.org/D158913
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