[PATCH] D158759: [RISCV] Add a pass to rewrite rd to x0 for AMO instrs whose return values are unused
Yingwei Zheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 24 11:25:39 PDT 2023
dtcxzyw added a comment.
In D158759#4614563 <https://reviews.llvm.org/D158759#4614563>, @craig.topper wrote:
> This also applies to volatile regular loads.
Indeed. But I could not find any pattern like `lw\tzero` in the GCC testsuite. Actually it also applies to sc.w/d and amocas.w/d/q. This pass doesn't handle them since they are not common.
Could you please show me some real-world examples?
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https://reviews.llvm.org/D158759/new/
https://reviews.llvm.org/D158759
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