[PATCH] D158589: [MIPS] Add handing of forbidden slot when IR with inline asm

YunQiang Su via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 23 23:46:31 PDT 2023


wzssyqa added a comment.

In D158589#4612830 <https://reviews.llvm.org/D158589#4612830>, @jrtc27 wrote:

> With the exception of 5, these all sound like garbage inline asm input? If you have a dangling delay slot at the end of the inline assembly, that's your problem, not the compiler's. And don't we default to reorder, anyway, so the only way to write that is to first .set noreorder?

To make this problem more clear, this patch is about forbidden slot, not delay slot.
In MIPSr6, you cannot put a CTI (branch/jump instruction) just after another CTI, even they are compact(no delay slot),
so a `nop` is needed to insert.


Repository:
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https://reviews.llvm.org/D158589



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